Stories by cdr

Singeli – High-level interface for low-level programming

Using the Ziggurat Method for Sampling Random Coordinates from a Unit Circle

LoongArch64 Subjective Higlights

RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?

Lexical analysis and parsing techniques for a vector machine (1975) [pdf]

The Saturn Microarchitecture Manual

Web 2024 (2014)

RISC-V Vector Extension for Integer Workloads: An Informal Gap Analysis

Box64: Optimizing the RISC-V Back End, Utilizing RVV and More

Vector Models for Data-Parallel Computing (1990) [pdf]

SWAR UTF-8 Validation with the hidden RISC-V gem xperm4

Akeana Exits Stealth Mode with Comprehensive RISC-V Processor Portfolio

Gf2p8affineqb: Int8 Shifting

RISCVuzz: Discovering CPU Vulnerabilities via Differential Hardware Fuzzing [pdf]

Convex Architecture Handbook 1984 [pdf]

ARM's Scalable Vector Extensions: A Critical Look at SVE2 for Integer Workloads

A simple superscalar out of order RISC-V (micro)processor

Decapsulating the CH32V203 Reveals a Separate Flash Die

The Improved RISC-V Specification (latest WIP draft)

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