Stories by camel-cdr

RISC-V Integrated Matrix Extension Release for Internal Review

Felix86 26.03: AVX, AVX2, BMI1 and F16C Support

Visualizing the RISC-V Instruction Set

RISC-V Oral History Panel [video]

“One Student One Chip” Course Homepage

OpenXiangShan Tutorials at MICRO'25

XiangShan Vector Floating-Point Unit Design

GCC Auto-Vectorization for RISC-V "V" Extension: Comparative Study Against AVX2 [pdf]

Apple Trace Cache

Sixth Championship of Branch Prediction (CBP2025)

Singeli – High-level interface for low-level programming

Using the Ziggurat Method for Sampling Random Coordinates from a Unit Circle

LoongArch64 Subjective Higlights

RISC-V in AI and HPC Part 1: Per Aspera Ad Astra?

Lexical analysis and parsing techniques for a vector machine (1975) [pdf]

The Saturn Microarchitecture Manual

Web 2024 (2014)

RISC-V Vector Extension for Integer Workloads: An Informal Gap Analysis

Box64: Optimizing the RISC-V Back End, Utilizing RVV and More

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