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spym_
Show HN: FPGA design acceleration – idiomatic Python to synthesizable Verilog
2 points
spym_
2026-06-27T14:47:42Z
holoso.digital
Dataflow programming on an MCU in C++: tiny pubsub library for DSP and controls
1 points
spym_
2025-03-25T17:24:51Z
github.com
Electropermanent magnets rendering electromechanical payload grippers obsolete
3 points
spym_
2024-10-31T16:19:52Z
forum.zubax.com
Cross-VM side-channel data exchange via CPU load modulation
5 points
spym_
2021-06-01T06:25:13Z
github.com