Stories by blakepelton

Shadow: Simultaneous Multi-Threading Architecture with Asymmetric Threads

Light-Weight Cache Replacement for Instruction Heavy Workloads

LoopFrog: In-Core Hint-Based Loop Parallelization

CHERIoT RTOS: An OS for Fine-Grained Memory-Safe Compartments

Dynamic Load Balancer in Intel Xeon Scalable Processor

The XOR Cache: A Catalyst for Compression

Rearchitecting the Thread Model of In-Memory Key-Value Stores with μTPS

CHERIoT: Complete Memory Safety for Embedded Devices

Morsel-Driven Parallelism

Rearchitecting the Thread Model of In-Memory Key-Value Stores with μTPS

Tai Chi: A General High-Efficiency Scheduling Framework for SmartNICs

Oasis: Pooling PCIe Devices over CXL to Boost Utilization

Backdoors to Typical Case Complexity

DPU-KV: DPU Offloading for In-Memory Key-Value Stores

How to Copy Memory? Coordinated Asynchronous Copy as a First-Class OS Service

Synopsys and Nvidia Double Down on Acceleration

High-Performance Query Processing with NVMe Arrays

Why Wait or Yield When You Can Preempt?

Fast and Scalable Data Transfer Across Data Systems

Falcon: Google's Hardware Transport

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