Stories by hasheddan

Connect anywhere: Introducing the M-Series

AMD's RISC CPU

Groq Inference Tokenomics: Speed, but at What Cost?

Clarifying instruction semantics with P-Code

You Might Not Need Floating Point

RISC-V Optimization Guide

FPGAs vs. DSP Chips

From 1s to 4ms

The Hard Thing About Abstraction

Gptscript

Philip Freidin on Microarch Club

From Go to Rust: The Two Types of Readable Code

Rubra: Develop Your AI Assistants Locally

Rubra

Realtime

AMD Zen 6 – Next-Gen Chiplets and Packaging

Measuring Stack Usage the Hard Way (2023)

Optimizing the Metal pipeline to maintain 120 FPS in GPUI

WASI 0.2 Launched

RISC-V Assembler: Shift

17
18
19
20
21
22
23
24
25
26